Spin torque transfer technology, also referred to as spin electronics, which is based on changing magnetic state of the system by momentum transfer from conduction electrons, is a recent development. Spin torque RAM or ST RAM is a non-volatile random access memory application that utilizes spin torque technology. Digital information or data, represented as a “0” or “1”, is storable in the alignment of magnetic moments within a magnetic element. The resistance of the magnetic element depends on the moment's alignment or orientation. The stored state is read from the element by detecting the component's resistive state.
The magnetic element, in general, includes a ferromagnetic pinned layer (PL), and a ferromagnetic free layer (FL), each having a magnetization orientation. A non-magnetic barrier layer is therebetween. The magnetization orientations of the free layer and the pinned layer define the resistance of the overall magnetic element. Usually the orientation of the PL is fixed by the strong exchange coupling of an antiferromagnetic layer which is immediate contact with the PL. The resistance is changed by changing the orientation of the FL. One particular type of such an element is what is referred to as a “spin tunneling junction,” “magnetic tunnel junction cell”, “spin torque memory cell”, and the like. When the magnetization orientations of the free layer and pinned layer are parallel, the resistance of the element is low (RL). When the magnetization orientations of the free layer and the pinned layer are antiparallel, the resistance of the element is high (RH). The magnetization orientation is switched by passing a current perpendicularly through the layers. The current direction is different for writing “1” or “0”. To write “1” (RH) the current flows from the PL to FL, and reversed to flow from FL to PL to write “0” (RL).
Many magnetic elements store only two states or data bits, i.e., “0” and “1”. Some magnetic elements, often referred to as multi-bit elements, are configured to store multiple states or data bits, i.e., four bits “00”, “01”, “10” and “11”. One configuration for a four bit multi-bit element has two magnetic tunnel junctions combined, so that the magnetic element has two free layers and two pinned layers. The two free layers have different resistances, so that four different resistances are available for the overall resistance of the element. Other designs of multi-bit elements can be used.